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dear customers, about the change in the name such as "oki electric industry co. ltd." and "oki" in documents to oki semiconductor co., ltd. the semiconductor business of oki electric industry co., ltd. was succeeded to oki semiconductor co., ltd. on oc tober 1, 2008. therefore, please accept that although the terms and marks of "oki electric indust ry co., ltd.", ?oki electric?, and "oki" remain in the documents, they all have been changed to "oki semiconductor co., ltd.". it is a change of the company name, the co mpany trademark, and the logo, etc. , and not a content change in documents. october 1, 2008 oki semiconductor co., ltd. 550-1 higashiasakawa-cho, hachio ji-shi, tokyo 193-8550, japan http://www.okisemi.com/en/
? semiconductor msm6786 1/17 fedl6786-03 ? semiconductor msm6786 1/3, 1/4 duty lcd driver with 4-dot common driver and 29-dot segment driver general description the msm6786 is a dynamic display lcd driver and can be switched to 1/3 or 1/4 duty. it can dis-play up to 116 segments with 1/4 duty and up to 87 segments with 1/3 duty. it can also drive one led directly. the built-in 5 6 key circuit allows input through a keyboard, and minimizes the number of wires between the front panel and cpu. features ? power suppy voltage : 5v 10% ? operating temperature : C40 to +85 c ? 29-output segment driver 1/4 duty dynamic drive : up to 116 segments can be displayed 1/3 duty dynamic drive : up to 87 segments can be displayed ? one led can be driven directly (i o =C15ma max) ? built-in 5 6 key scan circuit allows reading of the operation status of up to 30 switches. ? interface with cpu is implemented by load, data i/o and clock in serial method. ? built-in rc oscillator for lcd ac drive ? built-in voltage dividing resistor for bias voltage generation ? package: 56-pin plastic qfp (qfp56-p-910-0.65-2k) (product name : MSM6786GS-2K) fedl6786-03 this version: sep. 2000 previous version: nov. 1997
? semiconductor msm6786 2/17 fedl6786-03 block diagram 3/4sel osc reset led drv. timing gen. 29-dot seg. drv. osc load con- trol logic data i/o clock int 5 6 key scanner mode selector (data latch1) 30-bit latch (data latch4) 29-bit latch (data latch2) 29-bit latch (data latch3) 29-bit latch com. drv. com1 com2 com3 com4 led seg1 seg29 v dd v ss test c0 c1 c2 c3 c4 c5 r0 r1 r2 r3 r4 c5 c4 c3 c2 c1 c0 36(30+6)-bit shift register 29-bit data selector v dd v dd
? semiconductor msm6786 3/17 fedl6786-03 pin configuration (top view) 14 13 12 11 10 9 8 7 6 5 4 3 2 1 29 30 31 32 33 34 35 36 37 38 39 40 41 42 seg14 seg13 seg12 seg11 seg10 seg9 seg8 seg7 seg6 seg5 seg4 seg3 seg2 seg1 seg28 seg29 c0 c1 c2 c3 c4 c5 r0 r1 r2 r3 r4 load 28 27 26 25 24 23 22 21 20 19 18 17 16 15 seg27 seg26 seg25 seg24 seg23 seg22 seg21 v dd seg20 seg19 seg18 seg17 seg16 seg15 43 44 45 46 47 48 49 50 51 52 53 54 55 56 clock datai/o int reset led 3/4sel v dd osc v ss test com4 com3 com2 com1 56-pin plastic qfp
? semiconductor msm6786 4/17 fedl6786-03 absolute maximum ratings *1 applied to led output recommended operating conditions parameter symbol condition range unit v dd v ss =ov 4.5 to 5.5 v t op C40 to +85 c power supply voltage operating temperature specifications of external parts (oscillation circuit) parameter symbol condition unit r o k w c o m f oscillation resistor (resistance) oscillation capacitor (capacitance) max. 82 0.047 min. 20 0.01 parameter symbol condition rating unit v dd ta=+25 c C0.3 to +6.5 v v i ta=+25 c C0.3 to v dd +0.3 v i o ta=+25 c C20 ma t stg C55 to +150 c power supply voltage input voltage output current storage temperature *1
? semiconductor msm6786 5/17 fedl6786-03 electrical characteristics dc characteristics *1 clock, load, data i/o, reset and 3/4sel *2 c o = 0.022 m f, r o = 33 k w, no load parameter symbol condition applied pin min. max. unit "h" input voltage "l" input voltage "h" input voltage "l" input voltage "h" input current "l" input current "h" input current "l" input current "l" input current "l" input current "h" output voltage "l" output voltage "h" output voltage "l" output voltage "h" output voltage "l" output voltage supply current v ih1 *1 0.8v dd v v il1 v ih2 v il2 i ih1 i il1 i ih2 i il2 i il3 i il4 v os0 v os1 v os2 v os3 v oc0 v oc1 v oc2 v oc3 v oh1 v ol1 v oh2 v ol2 v oh3 v ol3 i dd segment output voltage common output voltage v i =v dd v i =0v v i =v dd v i =0v v dd =5.0v, v i =0v v dd =5.0v, v i =0v i o =C10 m a i o = 10 m a i o = 10 m a i o =10 m a i o =C10 m a i o = 10 m a i o = 10 m a i o =10 m a i o =C15ma i o =0.1ma i o =C0.4ma i o =0.4ma i o =C50 m a i o =1.0ma *2 0 0.7v dd 0 C0.07 C0.009 v dd C0.8 2/3v dd C0.8 1/3v dd C0.8 v dd C0.77 2/3v dd C0.77 1/3v dd C0.77 v dd C1.5 v dd C0.4 2.5 v dd 0.2v dd v dd 0.3v dd 1 C1 10 C10 C0.36 C0.045 2/3v dd +0.8 1/3v dd +0.8 0.8 2/3v dd +0.77 1/3v dd +0.77 0.77 0.4 0.4 0.4 0.4 v v v m a m a m a m a ma ma v v v v v v v v v v v v v v ma c0 - c5 clock, load 3/4sel data i/o c0 - c5 reset seg1-seg29 com1-com4 led data i/o int r0 - r4 v dd (v dd =5v 10%, ta=C40 to +85 c)
? semiconductor msm6786 6/17 fedl6786-03 switching characteristics load t r data i/o (when changing from input mode to output mode) data i/o (when changing from output mode to input mode) t wcp t wcp t f 0.8v dd 0.2v dd 1/f cp 0.8v dd 0.2v dd t lc t wld t cl 0.8v dd t pd1 t pd1 0.8v dd 0.2v dd 0.2v dd hiz t pd2 hiz 0.8v dd 0.2v dd t dsu t dhd clock data i/o (during input mode) (the charging and discharging time during high impedance depends on trace resistance and stray capacitance.) parameter symbol condition min. max. unit clock frequency clock pulse width rise/fall time data setup time data hold time load pulse width clock ? load time load ? clock time output delay time 1 output delay time 2 f cp mhz t wcp t r ,t f t dsu t dhd t wld t cl t lc t pd1 t pd2 200 100 100 200 100 200 2.0 50 300 300 ns ns ns ns ns ns ns ns ns c l =50pf (v dd =5v 10%, ta=C40 to +85 c)
? semiconductor msm6786 7/17 fedl6786-03 functional description pin functional description osc (pin 50) this is an input/output pin for the oscillator to generate lcd ac lighting and keyscan pulses. connect an external capacitor and resistor as shown below to form an rc oscillation circuit. the relationship between frame frequency f frm , keyscan period t scn and oscillation frequency f osc is: f frm = f osc /24, t scn = 20/f osc data i/o (pin 44) this is a serial data input/output pin. the pin is in output state from the first shift clock rise after key data output command writing, to the load pulse rise, and in input state otherwise. (the pin is in input state during reset.) the relationship between the data levels of this pin and the operations is shown below. level display key status "h" on on (close) "l" off off (open) clock (pin 43) this is an input pin for the shift clock. data i/o pin data is either input or output in synchroniza-tion with each rising clock edge. load (pin 42) this is a load pulse input pin used to transfer serial input data to a latch for display, to write commands, or to release the data i/o pin in output state. c o osc r o v dd
? semiconductor msm6786 8/17 fedl6786-03 r0 C r4 (pin 37-pin 41) these are key switch scan pulse output pins. during the scan operating, "l" level is output in sequence. all pluses go to "l" level when scanning stops. c0 C c5 (pin 31-pin 36) these are input pins that detect the key status. these pins have pull-up resistors. key matrices are formed with pins r0 C r4 . c0 c1 c2 c3 c4 c5 r0 r1 r2 r3 r4 int (pin 45) this is the keyscan end signal output pin. this pin becomes "h" when one scan cycle is completed, and returns to "l" by a load pulse after data output or when the "scan stop" command is written. (the pin is in "l" status during reset.) if this pin is not used, leave it unconnected.
? semiconductor msm6786 9/17 fedl6786-03 reset (pin 46) this is a reset signal input pin that intializes the ic, and is activated at "l" level. this pin has an internal pull-up resistor. the power on reset usually operates by externally connecting a capacitor. seg1 C seg29 (pin 1-pin 20, pin 22-pin 30) these are the output pins for lcd, and are connected to the segment pins of the lcd panel. see the section on data configuration for the relationship between seg output and input data. com1 C com4 (pin 56-pin53) these are output pins for the lcd, and are connected to common pins of the lcd panel. when 1/3 duty is selected, com4 pin should be left unconnected. see the section on data configuration of common output and input data. led (pin 47) this is an output pin for the led drive. the led and current limiting resistor are externally connected. reset v dd c rst led 3/4sel (pin 48) this is a duty select input pin. when "h" level is input, 1/3 duty is selected and when "l" level is input, 1/4 duty is selected. test (pin 52) this is an input pin for ic testing. this pin should be connected to v ss. v dd , v ss (pin 21, 49, 51) these are power voltage supply and ground pins.
? semiconductor msm6786 10/17 fedl6786-03 operating description display data input as shown in the section on data configuration, the data for display consists of data fields that correspond to segment on/off and command fields which indicate display data input. set the bits c0 to c1 of the command field to "0" or "1" according to the common to which the display data corresponds. to the other four bits, set the display data input commands. led display data corresponds to common 1. data input to the data i/o pin is saved in a shift register at the rising edge of the clock pulse, and is transferred to a data latch for display while the load pulse is at "h" level, and is then output through a segment driver. key data output the state of a key switch is indicated by on = 1, off = 0, and is read as 30 bits serial data. (for information on the sequence, see the section on data configuration.) to output data, the output command must be written, which causes the data to be output in synchronization with the rising edge of the clock pulse. by inputting a load pulse after that, the data i/o pin returns to the input state, and the next data or command can be input. (if a load pulse is applied earlier than the 30th data, the key data is output only by the number of the clock pulse. if clock pulses more than 30 data bits are applied, 30 data bits of key data are circulated.) d1 d2 d3 d4 d28 d29 d30 c0 c1 c2 c3 c4 clock datai/o old data new data load display output c5 c3 c4 c5 o1 o2 o3 o29 o30 clock datai/o next command input load output command write key data read note1 : the last key data must be read before the load pulse rises. note2 : upon swiching from output mode to input mode, the state of the data i/o pin is unstable for the duration of 300 ns after the rising of load pulse. for this reason, never input data to the data i/o pin during this period.
? semiconductor msm6786 11/17 fedl6786-03 r0 r1 r2 r3 r4 scan start command write or key status changed t scn data read data read data read scan stop command write int keyscan keyscan starts when the key state is changed or when the "keyscan start" command is written. scan continues until the "keyscan stop" command is written. (when powered on, the power- on reset sets at scan stop state.) when 1 keyscan cycle (t scn ) ends, the int signal becomes "h", so this signal can be used as an interrupt flag, which is dependent on switching conditions of keys. the int signal is reset when either the load pulse is input after key data is output, when the "keyscan stop" command is set, or when a reset signal is applied. notes : 1. a recognition error may occur if 3 or more key switches are pressed at the same time. (a switch that was not pressed is recognized as being pressed.) to properly recognize 3 or more key switches as being pressed at the same time, serially insert diodes at each switch. in order not to recognize 3 or more key switches as being pressed at the same time, a possible approach is to program the software so that the read data will be ignored when there are 3 or more ones in the data. the device recognizes simultaneous pressing of 2 key switches. however, take note 2 into consideration. 2. a change of key state is detected as a change in column input ( c0 - c5 ). therefore even if multiple switches connected to the same column are pressed at the same time, nothing will be detected as a change.
? semiconductor msm6786 12/17 fedl6786-03 display on, display off in power on reset state, display will go out. to turn the display on, write the display on command. the display and led can go out by writing the display off command, irrespective of display data. display on command releases the display off state. by writing this command, display will return to original state. d1 d2 c4 c2 c3 c4 c5 c2 c3 c4 c5 clock datai/o load display on/off c5 display on command write display off command write r eset display data input command list command name c5 c4 c3 c2 c1 c0 operation f1 f2 f3 f4 f5 f6 f7 f8 001000 1 0 1 1 010 011000 1 0 1 1 1010 1011 110 100 111 display data input (corresponding to common 1) display data input (corresponding to common 2) display data input (corresponding to common 3) display data input (corresponding to common 4) key data output display data input (1) + key data output display data input (2) + key data output display data input (3) + key data output display data input (4) + key data output display off display on key scan stop + key data output key scan stop key scan start + key data output : don't care
? semiconductor msm6786 13/17 fedl6786-03 data configuration (input data) d30 d29 d28 d3 d2 d1 c0 c1 c2 c3 c4 c5 command lcd display data led display data corresponds to seg1 corresponds to seg29 first bit notes : 1. led data corresponds to common 1 side (c0, c1 = 0). 2. d1 bit is unnecessary when led output is not used. 3. data output commands f2, f6 C f8 become effective if at least 3 bits (c3 C c5) are input. (d1 C d30 and c0 C c2 bits are not necessary.) command f4 and command f5 become effective if at least 4 bits (c2 - c5) are input. (d1 - d30, c0 and c1 bits are not necessary.) 4 . if dummy bits are necessary, add them before first bit. (output data) c5 c4 c3 c2 c1 c0 c5 c4 c3 c2 c1 c0 c5 c4 c3 c2 c1 c0 c5 c4 c3 c2 c1 c0 c5 c4 c3 c2 c1 c0 r4 r3 r2 r1 r0 30 1 last bit first bit
? semiconductor msm6786 14/17 fedl6786-03 application circuit com3 com4 com4 led com3 v dd load datai/o clock int seg1 seg29 msm6786 +5v c0 osc v ss test reset seg1 seg29 1/4 duty lcd panel c1 c2 c3 c4 c5 r0 r1 r2 r3 r4 cpu 5 6 key matrix com1 com2 com2 com1 3/4sel
? semiconductor msm6786 15/17 fedl6786-03 reference data resistance r o [k w ] f frm vs. r o , c o 1000 400 300 200 100 70 50 30 20 10 20 40 60 80 100 1 frame frequency characteristics the scanning period t scn is defined by the following equation: t scn = 5 6f frm [ms] frame frequency f frm [hz] t a = 25 [ c] v dd = 5.0 [v] c o = 0.01 f c o = 0.022 f c o = 0.033 f = 20 f osc [ms] 91
? semiconductor msm6786 16/17 fedl6786-03 (unit : mm) package dimensions notes for mounting the surface mount type package the sop, qfp, tsop, soj, qfj (plcc), shp and bga are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. therefore, before you perform reflow mounting, contact okis responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). package material lead frame material pin treatment package weight (g) oki electric industry co., ltd. rev. no./last revised epoxy resin 42 alloy solder plating ( 3 5 m m) 0.43 typ. 4/nov. 28, 1996 qfp56-p-910-0.65-2k mirror finish .
? semiconductor msm6786 17/17 fedl6786-03 notice 1. the information contained herein can change without notice owing to product and/or technical improvements. before using the product, please make sure that the information being referred to is up-to-date. 2. the outline of action and examples for application circuits described herein have been chosen as an explanation for the standard action and performance of the product. when planning to use the product, please ensure that the external conditions are reflected in the actual circuit, assembly, and program designs. 3. when designing your product, please use our product below the specified maximum ratings and within the specified operating ranges including, but not limited to, operating voltage, power dissipation, and operating temperature. 4. oki assumes no responsibility or liability whatsoever for any failure or unusual or unexpected operation resulting from misuse, neglect, improper installation, repair, alteration or accident, improper handling, or unusual physical or electrical stress including, but not limited to, exposure to parameters beyond the specified maximum ratings or operation outside the specified operating range. 5. neither indemnity against nor license of a third partys industrial and intellectual property right, etc. is granted by us in connection with the use of the product and/or the information and drawings contained herein. no responsibility is assumed by us for any infringement of a third partys right which may result from the use thereof. 6. the products listed in this document are intended for use in general electronics equipment for commercial applications (e.g., office automation, communication equipment, measurement equipment, consumer electronics, etc.). these products are not authorized for use in any system or application that requires special or enhanced quality and reliability characteristics nor in any system or application where the failure of such system or application may result in the loss or damage of property, or death or injury to humans. such applications include, but are not limited to, traffic and automotive equipment, safety devices, aerospace equipment, nuclear power control, medical equipment, and life-support systems. 7. certain products in this document may need government approval before they can be exported to particular countries. the purchaser assumes the responsibility of determining the legality of export of these products and will take appropriate and necessary steps at their own expense for these. 8. no part of the contents contained herein may be reprinted or reproduced without our prior permission. 9. ms-dos is a registered trademark of microsoft corporation. copyright 2000 oki electric industry co., ltd. printed in japan

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